Skip to main content
All CollectionsUsing Quilter
Preparing your board file
Preparing your board file

Define your board outline, import your net list, and load your component libraries

Updated over 5 months ago

How Quilter works with board files

Quilter's design agent works natively within your existing PCB design files to place, route, and verify your PCB designs.

Your input board file defines several of the key design parameters that Quilter needs to generate your layout candidates, including your board outline. Quilter is currently compatible with KiCAD (.kicad_pcb) and Altium (.PcbDoc) file formats.

NOTE:

By default, Quilter will attempt to place and route all components that are not placed within your board outline/perimeter. All components and traces that are placed and routed at the time of upload will be treated as fixed and will not be modified.

Preparing your design file for upload to Quilter

The fewer design parameters that you lock down in your input file (pre-placed components, pre-routed signals), the more flexibility you give to Quilter to explore and generate candidates that meet all of your requirements.

We recommend that all users take the following steps to prepare their board file for input:

  1. (Required) Define your board outline to establish an acceptable area for Quilter's designer to work within.
    โ€‹

  2. (Suggested) Define any major mechanical features, such as mounting holes or keep-out zones, that are defined by major mechanical or electrical features.
    โ€‹

  3. (Suggested) Pre-place your connectors. This ensures that connector placement complies with mechanical specifications and that Quilter's agent will not place connectors in bad locations, like the middle of a PCB.

Simply leave any components that you want Quilter to place and route itself off the board, and upload your file for auto-layout.

Reference Example

Below is an example of our OpenMV H7_R2 Computer Vision board file prior to uploading to Quilter for layout.

You can see that:

  • The board outline has been defined

  • The netlist and component footprints have been loaded

  • Location-sensitive connectors have been pre-placed within the board outline to make sure they end up in the right place

  • All other parts have been left outside fo the board outline

Did this answer your question?